imp Pin Mux

In addition to acting as a GPIO, each pin on the imp can be configured to one of several special hardware functions. While pins may only have one function at a time, they may be reconfigured during runtime to change that function. For example, a pin may first be configured as a Digital-to-Analog Converter (DAC) and then later reconfigured as an Analog-to-Digital Converter (ADC). Additionally, not all the pins in a hardware function need to be assigned to that function. For example, pins 8 and 9 may be used as uart1289 and pins 1 and 2 used as i2c12.

If you are using our standard Dev Kit, April, check out our April GPIO chart desktop reference.

imp001

Pin
 
uart1289
 
uart57
 
uart12
 
i2c89
 
i2c12
 
spi257
 
spi189
 
DAC
 
ADC
 
PWM
 
Pulse
Count
Wake
 
PTPG
Trigger
1 CTS TX SCL SCLK Yes Yes Yes Yes Yes
2 RTS RX SDA MISO Yes Yes
5 TX SCLK Yes Yes Yes For Pin 7
7 RX MOSI Yes Yes
8
 
TX
 
SCL
 
MOSI
 
Yes
 
Yes
 
For Pin 5
or 9
9 RX SDA MISO Yes Yes For Pin 2

Pin 6 is reserved for the ID chip and may not be used for any other purpose.

In GPIO mode pins may source or sink up to 4mA.

Pins 1 and 2 have higher coupling than other pin pairs; if one pin is used for high-speed signalling, it is recommended that the other not be used for analog sampling.

The wakeup pin – pin 1 on the imp001 and imp002 – can be used to wake the imp from a deep sleep, but only if the pin is configured with this capability before the imp goes into deep sleep. To configure the pin for this role, use the following code:

hardware.pin1.configure(DIGITAL_IN_WAKEUP, callbackFunction)

Once the imp is in deep sleep – typically with a server.sleepfor() or server.sleepuntil() call – setting pin 1 to logic high will wake the device. However, Squirrel is started afresh so the registered callback request will be lost. The callback function will be called if the imp is already awake when the pin is triggered.

The imp wakes when the pin is high, not on the rising edge. The external device responsible for signalling the wakeup pin should subsequently drive the pin low; the imp cannot return to sleep if the wakeup pin is high. An internal pull-down is automatically enabled when wakeup is configured.

imp002

imp002 solder-down modules provide all of the same pins as the imp001, with all the same functions. In addition, the following pins and peripherals are also available:

Pin
 
uart6E
 
uartB
 
ADC
 
PWM
 
PTPG
Trigger
6 TX
8 For Pin 5,
9 or C
A Yes
B RX (only) Yes
C Yes
D
E RX

No additional I²C, SPI, DAC, PulseCount, or Wake peripherals are available.

imp003/Murata LBWA1ZV1CD

The imp003 (Murata part number LBWA1ZV1CD) offers a broader array of IO options than either the imp002 or the imp001. To accommodate these options, it has been necessary to adopt a modified nomenclature for the imp003’s pins. Consequently, Squirrel code addressing pins or peripherals on the imp001 or imp002 will require modification to reference the new pin naming conventions; the actual functionality of the pins and peripherals is basically identical with a couple of exceptions noted below.

It is possible to check for imp003-specific pins using the following code:

if ("pinW" in hardware) { ... }

Since pin W is not present on the imp001 and imp002 but is present on the imp003, if this expression evaluates to true, you can configure the bus you wish to use:

if ("PinW" in hardware)
{
    // Code running on a LBWA1ZV1CD / imp003

    i2c <- hardware.i2cAB
}
else
{
    // Code running on an imp001 or imp002

    i2c <- hardware.i2c12
}

imp003 provides five separate UART, two I²C and two SPI buses, in addition to being able to use space in the system-controlled SPI flash – in most cases you don't need to use one of the GPIO pins' SPI buses to attach extra storage to the imp003.

UART

Name TX Pin RX Pin RTS Pin CTS Pin
uartDM D M
uartFG F G
uartWJ W J
uartQRPW Q R P W
uartUVGD U V G D

 
The imp003’s CPU is clocked at 144MHz, 20 per cent higher than the imp002’s processor. In most cases, this increase will not affect applications. However, applications which make use of UART buses to communicate with peripherals will be able to access higher bus clock speeds, since these are driven by the CPU clock.

I²C

Name SCL Pin SDA Pin
i2cAB A B
i2cFG F G

SPI

Name MOSI Pin MISO Pin SCLK Pin nSS Pin*
spiEBCA E B C A
spiLGDK L G D K

*nSS is driven by master in certain SPI modes (byte sync) and may be used to implement SPI slave

The imp003’s CPU is clocked at 144MHz, 20 per cent higher than the imp002’s processor. In most cases, this increase will not affect applications. However, applications which make use of SPI buses to communicate with peripherals will be able to access higher bus clock speeds, since these are driven by the CPU clock.

imp003 pin mux

Pin
 
 
uartFG
 
 
uartQRPW
 
 
uartUVGD
 
 
uartWJ
 
 
uartDM
 
 
i2cFG
 
 
i2cAB
 
 
spiEBCA
 
 
spiLGDK
 
 
ADC
 
 
DAC
 
 
PWM
 
 
Wake
from
sleep
State
Change
Callback
PTPG
Trigger
 
A SCL nSS Yes Yes Yes
B SDA MISO Yes Yes Yes
C SCLK Yes Yes Yes Yes
D CTS TX SCLK Yes
E MOSI Yes Yes Yes for C
F TX SCL Yes Yes for K,X
G RX RTS SDA MISO Yes
H Yes
J RX Yes
K nSS Yes Yes
L MOSI Yes for G
M RX Yes Yes for D
N Yes
P RTS Yes
Q TX Yes
R RX Yes
S
T Yes
U TX Yes
V RX Yes
W CTS TX Yes Yes Yes
X Yes
Y

 
Not all of the imp003’s pins, when assigned as digital inputs, can be supplied with callback functions that will be triggered when the pin’s state changes. This is in contrast to the imp002, for which all of its available pins may be provided with state-change callbacks. The imp003 pins able to be configured with a callback – using the pin.configure() API call – are listed above. Attempts to nominate a callback for any of the remaining pins will generate a Squirrel runtime error.

The imp003’s wakeup pin, pin W, can be used to wake the imp from a deep sleep, but only if the pin is configured with this capability before the imp goes into deep sleep. To configure the pin for this role, use the following code:

hardware.pinW.configure(DIGITAL_IN_WAKEUP)

Once the imp is in deep sleep – typically with a server.sleepfor() or server.sleepuntil() call – setting pin W to logic high will wake the device. The imp wakes when the pin is high, not on the rising edge. The external device responsible for signalling the wakeup pin should subsequently drive the pin low; the imp cannot return to sleep if the wakeup pin is already high. An internal pull-down is automatically enabled when wakeup is configured.